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All publications for the rubric Electronics (wafers, semiconductors, microchips,...)

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  • Electronics (wafers, semiconductors, microchips,...)

IC-Link by imec expands collaboration with TSMC to accelerate customer access to advanced-node chip design infrastructure and support

IC-Link by imec expands collaboration with TSMC

Through TSMC's OIP Cloud Alliance, the collaboration combines secure cloud-based design capabilities with access to advanced node technology and expert support to help innovators bring chips to market faster.      

1. IC-Link by imec and TSMC are expanding their collaboration through TSMC Open Innovation…

Thanks to advanced safety technology, mobile robots and employees move safely and efficiently side by side even in narrow cleanroom areas. (Source: Fabmatics GmbH, Photographer: Sven Claus (FotograFisch)) The mobile HERO Fab 200 positions a wafer container with millimeter precision in a cleanroom rack – an example of reliable material handling in established 200-mm factories. (Source: Fabmatics GmbH, Photographer: Sven Claus (FotograFisch)) The Wiferion charging panel is flush-mounted into the cleanroom floor slab – for contactless charging without particle generation and minimally invasive installation. (Source: Fabmatics GmbH, Photographer: Sven Claus (FotograFisch)) Charging in progress: The mobile robot charges energy via a charging panel in front of the handling station and continues working without separate charging breaks. (Source: Fabmatics GmbH, Photographer: Sven Claus (FotograFisch))
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  • Electronics (wafers, semiconductors, microchips,...)

The cleanest way to charge: Wiferion drives the semiconductor industry

Inductive charging makes cleanroom automation by Fabmatics maintenance-free and safe

The global demand for power electronics and chips for applications in automotive, communication, and industrial sectors continues to grow unabated. However, many of the manufacturing facilities originate from a different era: 200-mm wafer factories established in the 1990s and 2000s are still operat…

Figure 1Ge/Si Avalanche Photodiode fabricated on imec's 300 mm silicon photonics platform 1
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  • Electronics (wafers, semiconductors, microchips,...)

Manufactured on its 300 mm silicon photonics platform, imec's novel APD lays the foundation for the next generation of AI data center optical interconnects

Imec debuts 100 GHz Ge/Si avalanche photodiode (APD) enabling net 400 Gbps data reception at just 5 V

– Imec presents the world’s first Ge/Si avalanche photodiode (APD) to combine 100 GHz bandwidth, low-voltage (5 V) operation and a responsivity of 1.8 A/W across both the O- and C-bands.
– Combined with imec's previously demonstrated beyond-110 GHz Ge/Si electro-absorption modulator (EAM), the device…

Figure 1 - TDSEM and TEM image of a 2ML αSi-NbTiN Josephson junction Figure 2 - TEM image of a 3ML NbTiN wires and vias Figure 3 - Wire scaling benchmarking between NbTiN wires fabricated at imec with state-of-the-art superconducting wires. TEM image of a 50nm thick and 30nm wide NbTiN wire (inset)
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  • Electronics (wafers, semiconductors, microchips,...)

New superconducting digital program brings together foundries, system companies and hyperscalers around industry needs in next-gen HPC, AI, quantum computing, photonics and neuromorphic computing.

Imec advances scalable superconducting technology with world-first NbTiN circuits and 30nm interconnects

– At the 2026 Applied Superconductivity Conference, imec demonstrates two world-firsts: (1) a three-metal-level (3ML) niobium-titanium-nitride (NbTiN)-based Josephson junction circuit, achieving circuit design densities of 3.8 million junctions per cm2; and (2) 3ML NbTiN routing with superconducting…

The E-MAP consists of a closed system in which robotically automated material experiments are conducted under protective atmosphere. (Image: Holger Röhm, KIT)
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  • Electronics (wafers, semiconductors, microchips,...)

New research platform at KIT investigates materials for thin-film photovoltaics and other optoelectronic applications independently

Automated laboratory accelerates material development

Systematically investigate, evaluate, and targetedly develop thousands of material variants – this is made possible by the new Energy Materials Acceleration Platform (E-MAP) at the Karlsruhe Institute of Technology (KIT). It combines automated experiments with precise material characterization, layi…

Perfectionism pays off: a single flake of skin can be enough to destroy dozens of microchips.  (Image: Lucia Luca Hunziker / ETH Zurich) Microchip fabrication typically uses silicon wafers as the basis – shimmering green, for example, as shown in the picture.  (Image: Lucia Luca Hunziker / ETH Zurich)
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  • Science

From biotech and engineering to the latest work in physics – many scientific breakthroughs start life in the clean room. ETH researchers enjoy access to top-notch facilities in Basel and Zurich.

Clean sweep for cutting-edge research

The room hums to the sound of powerful ventilators. In the pale light, Peter Rimpf pulls a full-body coverall with hood over his clothes, steps into clean room shoes and snaps a nitrile glove onto each hand. “A single flake of skin can destroy a dozen chips,” says Rimpf, who heads operations at the…

Figure 1. Representative 0.55NA EUV wafer SEM images showing CAR patterning on tight-pitch logic metal and via structures, including SRAM (AEI), PnR (AEI), meander e-test (ADI), and 28nm C2C random logic vias (ADI) (AEI = after etch inspection; ADI = after development inspection).
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  • Electronics (wafers, semiconductors, microchips,...)

Imec and its material suppliers optimize their chemically amplified resist (CAR)-based platforms toward High NA EUV single patterning of 22nm pitch line structures supporting A14/A10 logic designs

Imec demonstrates the extension of chemically amplified resists for High NA EUV lithography

– Imec optimizes CAR-based technology for the High NA EUV single patterning of several layers of the A14/A10 logic technology nodes.
– A variety of tight-pitch logic metal line and via structures have been demonstrated, including meander and forked e-test structures down to 22nm pitch, 24nm SRAM layo…

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