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- Electronics (wafers, semiconductors, microchips,...)
Improved die-to-wafer assembly flow opens doors to logic/memory-on-logic stacking, and to optically interconnected systems-on-wafer
Imec demonstrates die-to-wafer hybrid bonding with a Cu interconnect pad pitch of 2µm
This week, at the 2024 IEEE Electronic Components and Technology Conference (ECTC), imec, a world-leading research and innovation hub in nanoelectronics and digital technologies, presents a Cu-to-Cu and SiCN-to-SiCN die-to-wafer bonding process resulting in a Cu bond pad pitch of only 2µm at <350…








